Lead Engineer Job in Vayavya Labs Pvt. Ltd.
Lead Engineer
Vayavya Labs Pvt. Ltd.
4+ weeks ago
- Bengaluru, Bangalore Urban, Karnataka
- Not Disclosed
- Full-time
- Permanent
Job Summary
You will be required to understand Accellera s PSS standards. You will be involved in doing digital verification of PCIe protocol , ARM-based SoC designs. You will be involved in defining verification architecture and developing verification environments for new IPs.
Key Technical Skills:
- Strong background in digital verification using System Verilog and UVM
- Well-versed in the functional, performance and power verification of PCIe protocol at RTL IP, sub-system, and SoC levels in simulation and in-circuit Emulation
- Experience in verification of ARM-based SoC designs and with complex I/O protocols (like PCIe)
- Familiarity with C/C++ programming
- Capable of defining verification architecture for new IP s and should have developed verification environments
- Familiar with using verification IP (VIP) and SystemVerilog/UVM test suites for PCIe protocol from 3rd party vendors like Synopsys, Cadence, Mentor, etc. (Good to have)
- Exposure to working with Portable Stimulus and Test Specification (PSS) (Good to have)
- Understanding of verification architecture for various IP s (Good to have)
- Experience in developing verification environments (Good to have)
Experience Required :
6 to 9 Years
Vacancy :
2 - 4 Hires
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