Lead Design Engineer Job in Cadence Design Systems
Lead Design Engineer
- Pune, Pune Division, Maharashtra
- Not Disclosed
- Full-time
- Permanent
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Position Description:
* As a member of the Design Verification Team for Xtensa processors you will be responsible for verification of microprocessor cores and their peripherals.
* You will implement simulation or emulation testbenches, assembly/C language diagnostics, assertion checkers or coverage monitors to meet target verification goals.
* You will also assist with developing testplans, debugging failures and analyzing coverage information.
* You will work closely with the RTL and EDA teams.
Required Skills and Experience:
* 5-7 years of design verification experience
* BE/BTech/BS (or higher) in EE/Computer Engineering
* Experience in mentoring junior engineer
* Excellent knowledge of computer architecture and design verification fundamentals
* Some experience with Verilog and popular EDA simulation, System Verilog assertions and testbench methodologies
* Experience in developing complex test bench in SystemVerilog using OVM/UVM methodology
* Exposure to scripting languages like Perl, Unix shell or similar languages
* Some experience with assembly language programming required
* Excellent written and oral communication skills necessary
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