Memory Layout Design Engineers Job in Zia Semiconductor

Memory Layout Design Engineers

Zia Semiconductor 4+ weeks ago

• Bengaluru, Bangalore Urban, Karnataka
• Not Disclosed
• Full-time
• Permanent

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Job Summary

• Understanding of memory compiler floor plan
• Memory Leafcell layout development
• Memory backend Qualifications (DRC/LVS/ERC/DFM)
• Electrical qualifications (EM/IR)

Experience Required :

2 to 5 Years

Vacancy :

2 - 4 Hires

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