Verification Engineer Job in Smartdv Technologies India Private Limited
Verification Engineer
Smartdv Technologies India Private Limited
4+ weeks ago
- Bengaluru, Bangalore Urban, Karnataka
- Not Disclosed
- Full-time
- Permanent
Job Summary
- 2-7+ Years of experience in ASIC verification
- Should have tapped out atleast 1 chips from specs to post silicon debug
- Should have experience in creating testbenches from scratch
- Should have very good understanding of coverage driven verification closure
- Strong knowledge of Verilog, HVL (VERA or SystemVerilog or e (Specman))
- Very good experience in writing scripts in Perl or Python or TCL
- Independent team player with excellent communication skills
- Knowledge of C++
- Preference is given for students from IIT and NIT's
Experience Required :
2 to 7 Years
Vacancy :
2 - 4 Hires
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