DFT Engineer Job in Posterity Consulting

Will be responsible for Designing and Implementing DFT techniques (Memory BIST/Scan /On-Chip Compression/At-speed Scan/Test-clocking/Boundary Scan/Analog Testing/Pin-muxing/Logic BIST) on complex SOCs to improve testabilityTest Modes implementation and verification, scanion including on-chip compressionImplementing, integrating and verifying memory BIST and boundary scan Test vector (Stuck-at/At-speed/Path delay/SDD/IDDQ/Bridging fault) generation with high test coverage and simulations at gate level with timing (SDF)Closing working with Test Engineer and Product Engineer team to understand testability requirement for zero-defectPost-silicon bring-up supportBasic understanding of complete SOC design and flowCross functional teams interaction for issue resolutionParticipate in driving new DFT methodology and solutions to improve quality, reliability and in-system test and debug capabilityMentoring new team members

Minimum Requirements

B.tech ECE/EEE

B.Tech/B.E.